A/D Control Status Register (Low) (Adcs0) - Fujitsu F2MCTM-16LX Hardware Manual

18.3.2

A/D Control Status Register (Low) (ADCS0)

The A/D control status register (Low) (ADCS0) provides the following settings:
• Selecting A/D conversion mode
• Selecting start channel and end channel of A/D conversion
A/D Control Status Register (Low) (ADCS0)
7
Address
000068
MD1 MD0 S10
H
R/W
R/W
X
Figure 18.3-3 A/D Control Status Register (Low) (ADCS0)
6 5 4 3 2
- - -
- - -
R/W R/W
: Read/Write
: Undefined bit
: Indeterminate
: Reset value
CHAPTER 18 8-/10-BIT A/D CONVERTER
1 0
Reset value
Re-
-
000XXXX0
B
served
-
R/W
bit0
Reserved
0
Always write 0.
bit5
S10 Resolution select bit
Resolution of A/D conversion is set to 10-bit.
0
Resolution of A/D conversion is set to 8-bit.
bit7 bit6
A/D conversion mode select bit
MD1 MD0
Single-shot conversion mode 1
0 0
(restartable during conversion)
Single-shot conversion mode 2
0
1
(not-restartable during conversion)
Continuous conversion mode
1
0
(not-restartable during conversion)
Pause-conversion mode
1
1
(not-restartable during conversion)
Reserved bit
349