Block Diagram Of 8-/10-Bit A/D Converter - Fujitsu F2MCTM-16LX Hardware Manual

18.2

Block Diagram of 8-/10-bit A/D Converter

The 8-/10-bit A/D converter consists of following blocks.
Block Diagram of 8-/10-bit A/D Converter
A/D control
status
BUSY
register
(ADCS0/
ADCS1)
ADTG
Pin
AN0 to AN7
AN15 to AN8
A/D setting
register
ST2
(ADSR0/
ADSR1)
: Undefined
Reserved : Always set to 0.
: Machine clock
Figure 18.2-1 Block Diagram of 8-/10-bit A/D Converter
Interrupt request output
INT INTE PAUS STS1 STS0 STRT
2
Starting
selector
Sample &
hold circuit
Analog
channel
selector
A/D data
D9 D8
register
(ADCR0/
ADCR1)
Re-
ST1 ST0 CT2 CT1 CT0
served
CHAPTER 18 8-/10-BIT A/D CONVERTER
MD1 MD0 S10
Software
starting
2
Comparator
AVR
AVcc
D/A converter
AVss
3
3
D7 D6 D5 D4 D3 D2 D1 D0
Decoder
8
Re-
ANS3 ANS2 ANS1 ANS0
served
Re-
served
Control circuit
ANE3 ANE2 ANE1 ANE0
341