Ry/By Timing During Writing/Erasing; Rst And Ry/By Timing - Fujitsu F2MCTM-16LX Hardware Manual

RY/BY Timing during Writing/erasing

Figure C-7 Timing Diagram for Output of RY/BY Signal during Writing/erasing
CE
WE
RY/BY

RST and RY/BY Timing

Figure C-8 Timing Diagram for Output of RY/BY Signal at Hardware Reset
RY/BY
CE
RST
APPENDIX C Timing Diagrams in Flash Memory Mode
Rising edge of last write pulse
Writing or erasing
t
BUSY
t
RP
t
Ready
641