Fujitsu F2MCTM-16LX Hardware Manual page 435

Note:
If LIN-UART is reset by setting SMR:UPCL to "1", the Reload Counters will restart too.
• Automatic restart (reception reload counter only)
In asynchronous LIN-UART mode, if a falling edge of a start bit is detected, the Reception Reload
Counter is restarted. This is intended to synchronize the serial shift register to the incoming serial data
stream.
Clearing reload counters
The reload value of the baud rate generator register (BGR1, BGR0) and the reload counters are cleared to
"00" by the MCU global reset and the counters stops. The reload counters are cleared to "00
"1" to the UPCL bit in the SMR register. However, the value stored in the reload register is kept unchanged
and the counters restart from reload value immediately. Writing "1" to the REST bit does not clear the
counters and they restart from reload value immediately.
CHAPTER 20 LIN-UART
" by writing
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