Fujitsu F2MCTM-16LX Hardware Manual page 189

Table 10.2-1 SIN0/SIN1 Input Level Setting
DDRA
SIL0/SIL1 bit
Note:
SIL0, SIL1 are write-only, and "1" is always read from these bits. Therefore, instructions that perform a
read-modify-write (RMW) operation such as the INC/DEC instruction, cannot be used at DDRA.
DDRA: Bits 0 to 2, Bits 5 to 7 (unused bits)
"1" is always read from these bits. Writing to these bits is no effect.
ILSR
IL8 bit
0
0
1
SIN0(P82) / SIN1(P85)
0 Automotive level
1 CMOS level
x CMOS level
CHAPTER 10 I/O PORTS
input level
173