Acceptance Mask Registers 0 And 1 (Amr0 And Amr1) - Fujitsu F2MCTM-16LX Hardware Manual

21.4.22

Acceptance Mask Registers 0 and 1 (AMR0 and AMR1)

There are two acceptance mask registers, which are available either in the standard
frame format or extended frame format.
AM28 to AM18 (11 bits) are used for acceptance masks in the standard frame format and
AM28 to AM0 (29 bits) are used for acceptance masks in the extended format.
Register Configuration
Figure 21.4-22 Configuration of the Acceptance Mask Register 0 (AMR0)
Address
CAN1: 007D14
Address
CAN1: 007D15
Address
CAN1: 007D16
Address
CAN1: 007D17
R/W : Read/Write
X : Undefined
−
: Unused
: Used bit in typical frame format
bit7 bit6 bit5
AM28 AM27 AM26
H
R/W R/W R/W
bit15 bit14 bit13
AM20 AM19 AM18
H
R/W R/W R/W
bit7 bit6 bit5
AM12 AM11 AM10
H
R/W R/W R/W
bit15 bit14 bit13
AM4 AM3 AM2
H
R/W R/W R/W
bit4 bit3 bit2
AM25 AM24 AM23 AM22
R/W R/W R/W
bit12 bit11 bit10
AM17 AM16 AM15 AM14
R/W R/W R/W
bit4 bit3 bit2
AM9 AM8 AM7
R/W R/W R/W
bit12 bit11 bit10
−
AM1 AM0
−
R/W R/W
bit1 bit0 AMR01(Byte0)
AM21 Reset value
XXXXXXXX
R/W R/W
bit9 bit8 AMR01(Byte1)
AM13 Reset value
XXXXXXXX
R/W R/W
bit1 bit0 AMR01(Byte2)
AM6 AM5 Reset value
XXXXXXXX
R/W R/W
bit9 bit8 AMR01(Byte3)
− −
Reset value
XXXXXXXX
− −
B
B
B
B
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