Fujitsu F2MCTM-16LX Hardware Manual page 216

CHAPTER 12 WATCHDOG TIMER
Count clock selector
The count clock selector selects a count clock input to the watchdog timer from the timebase timer or watch
timer. Each timer output has four time intervals that can be set.
Watchdog timer counter (2-bit counter)
The watchdog timer counter is a 2-bit counter that uses the timebase timer output or watch timer output as a
count clock. The clock source output destination is set by the watchdog clock select bit in the watch timer
control register (WTC: WDCS).
Watchdog reset generator
The watchdog reset generation circuit generates a reset signal when the watchdog timer overflows
(carrying).
Counter clear circuit
The counter clear circuit clears the watchdog timer counter.
Watchdog timer control register (WDTC)
The watchdog timer control register starts and clears the watchdog timer, sets the interval time, and holds
reset factors.
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