Block Diagram Of 8-/16-Bit Ppg Timer C; Block Diagram For 8-/16-Bit Ppg Timer C - Fujitsu F2MCTM-16LX Hardware Manual

CHAPTER 16 8-/16-BIT PPG TIMER
16.2.1

Block Diagram for 8-/16-bit PPG Timer C

The 8-/16-bit PPG timer C consists of the following blocks.

Block Diagram of 8-/16-bit PPG Timer C

PRLHC
(High level side)
PPGC temporary
buffer C (PRLBHC)
Reload register
L/H selector
Count start
value
PPGC down counter
Timebase timer output(512/HCLK)
- : Undefined
Reserved : Reserved bit
HCLK : Oscillation clock frequency
φ
: Machine clock frequency
* : The interrupt output of 8-/16- bit PPG timer C is combined to one interrupt by OR circuit with the interrupt
request output of PPG timer D.
286
Figure 16.2-2 Block Diagram of 8-/16-bit PPG Timer C
PPGC reload
register
PRLLC
(Low level
Select signal
Reload
Underflow
(PCNTC)
CLK
Resource clock (1/φ)
Resource clock (2/φ)
Resource clock (4/φ)
Resource clock (8/φ)
Resource clock (16/φ)
PPGC operation mode control
register (PPGCC)
PEN0 - PE0 PIE0 PUF0
Clear
Pulse selector
PPGC
output latch
Invert
PPG output control circuit
Count
clock
selector
3
Select signal
PCS2 PCS1 PCS0 PCM2 PCM1 PCM0
PPGC/D count clock select register (PPGCD)
High level side data bus
Low level side data bus
Re-
- -
served
R
Interrupt
request
S Q output*
Operation mode
2
control signal
PPGD underflow
PPGC underflow
(to PPGD)
Pin
PPGC
PPGD
output
- REV