Fujitsu F2MCTM-16LX Hardware Manual page 122

CHAPTER 5 CLOCKS
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(12)
(13)
(14)
(15)
(16)
(17)
(18)
(19)
MCS
MCM
SCS
SCM
CS1, CS0
CS2
Notes:
• The initial value for the machine clock setting is main clock (CKSCR: MCS = 1, SCS = 1).
• If both the SCS and MCS bits are "0", the SCS bit takes precedence, that is, the sub-clock is selected.
•
When sub-clock mode is switched to PLL clock mode, set the WS1 and WS0 bits of CKSCR to "10
106
Write "0" to MCS bit
Termination of PLL clock oscillation stabilization wait time & CS1, CS0= 00
Termination of PLL clock oscillation stabilization wait time & CS1, CS0= 01
Termination of PLL clock oscillation stabilization wait time & CS1, CS0= 10
Termination of PLL clock oscillation stabilization wait time & CS1, CS0= 11
Termination of PLL clock oscillation stabilization wait time & CS1, CS0= 10
Write "1" to MCS bit (include reset)
Synchronous timing of PLL clock and main clock
Write "0" to SCS bit
Synchronous timing of main clock and sub-clock
Write "1" to SCS bit (MCS1)
Termination of main clock oscillation stabilization wait time
Termination of main clock oscillation stabilization wait time & CS1, CS0= 00
Termination of main clock oscillation stabilization wait time & CS1, CS0= 01
Termination of main clock oscillation stabilization wait time & CS1, CS0= 10
Termination of main clock oscillation stabilization wait time & CS1, CS0= 11
Termination of main clock oscillation stabilization wait time & CS1, CS0= 10
Write "1" to SCS bit (MCS0)
Synchronous timing of PLL clock and sub-clock
: Machine clock select bit of clock selection register (CKSCR)
: Machine clock display bit of clock selection register (CKSCR)
: Machine clock display bit (sub) of clock selection register (CKSCR)
: Machine clock select bit (sub) of clock selection register (CKSCR)
: Machine clock of clock selection register (CKSCR)
: Multiplication rate selection bit of PLL/ subclock control register (PSCCR)
& CS2= 0
B
& CS2= 0
B
& CS2= 0
B
& CS2= 0
B
& CS2= 1
B
& CS2= 0
B
& CS2= 0
B
& CS2= 0
B
& CS2= 0
B
& CS2= 1
B
" "
or "11 .
B B