Fujitsu F2MCTM-16LX Hardware Manual page 23

Features
Table 1.1-3 MB90360 Features (1/2)
Features
UART
A/D converter
16-bit reload timer
16-bit I/O timer
16-bit input capture
8-/16-bit PPG
MB90F362/T(S), MB90362/T(S)
MB90F367/T(S), MB90367/T(S)
2 channels
Wide range of baud rate settings using a dedicated reload timer
LIN functionality working either as LIN master or LIN slave device
16 channels
10-bit or 8-bit resolution
Conversion time: Minimum 3 µs include sample time (per one channel)
2 channels
Operation clock frequency: fsys/2
Support External Event Count function
1 channel
I/O timer 0 (clock input FRCK0)
corresponding ICU 0/1/2/3.
Signal an interrupt when overflowing
Supports Timer Clear when a match with Output Compare (Channel 0, 4)
Operation clock freq.: fsys/2
(fsys=System clock freq.)
4 channels
Maintains I/O timer value by pin input (rising edge, falling edge, or both edges) and generates
interrupt.
2 channels
Supports 8-bit and 16-bit operation modes
Four 8-bit reload counter
Four 8-bit reload registers for L pulse width
Four 8-bit reload registers for H pulse width
A pair of 8-bit reload counters can be configured as one 16-bit reload counter or as 8-bit prescaler
plus 8-bit reload counter
Operation clock freq.: fsys, fsys/2
(fsys=system clock frequency, fosc=oscillation clock frequency)
MB90V340A-101, MB90V340A-102
MB90V340A-103, MB90V340A-104
1 3 5
, fsys/2 , fsys/2 (fsys=System clock freq.)
I/O timer 0 (clock input FRCK0) corresponds
to ICU 0/1/2/3, OCU 0/1/2/3
I/O timer 1 (clock input FRCK1) corresponds
to ICU 4/5/6/7, OCU 4/5/6/7
1 2 3 4
, fsys/2 , fsys/2 , fsys/2 , fsys/2
Supports 8-bit and 16-bit operation modes
Sixteen 8-bit reload counter
Sixteen 8-bit reload registers for L pulse width
Sixteen 8-bit reload registers for H pulse width
1 2 3
, fsys/2 , fsys/2 , fsys/2
CHAPTER 1 OVERVIEW
5 channels
24 channels
4 channels
4 channels
5 6 7
, fsys/2 , fsys/2
8 channels
8 channels
or 102.4 µs fosc=@5MHz
4
7