Message Buffer Valid Register (Bvalr) - Fujitsu F2MCTM-16LX Hardware Manual

21.4.9

Message Buffer Valid Register (BVALR)

Message buffer valid register (BVALR) stores the validity of the message buffers or
displays their state.
Register Configuration
Figure 21.4-9 Configuration of the Message Buffer Valid Register (BVALR)
Address
CAN1: 000081
Address
CAN1: 000080
R/W : Read/Write
Register Function
0: Message buffer (x) invalid
1: Message buffer (x) valid
If the message buffer (x) is set to invalid, it will not transmit or receive messages.
If the buffer is set to invalid during transmission operating, it becomes invalid (BVALx = 0) after the
transmission is completed or terminated by an error.
If the buffer is set to invalid during reception operating, it immediately becomes invalid (BVALx = 0). If
received messages are stored in a message buffer (x), the message buffer (x) is invalid after storing the
messages.
Notes:
• x indicates a message buffer number (x = 0 to 15).
• When invaliding a message buffer (x) by writing 0 to a bit (BVALx), execution of a bit manipulation
instruction is prohibited until the bit is set to 0.
• To invalidate the message buffer (by setting the BVALR: BVAL bit to 0) while the CAN controller is
operating for CAN communication (the read value of the CSR: HALT bit is 0 and the CAN controller is
operating for CAN bus communication to enable transmission and reception), follow the procedure in
"21.13 Precautions when Using CAN Controller".
bit15 bit14 bit13
BVAL15 BVAL14 BVAL13
H
R/W R/W R/W
bit7 bit6 bit5
BVAL7 BVAL6 BVAL5
H
R/W R/W R/W
bit12 bit11 bit10
BVAL12 BVAL11 BVAL10 BVAL9
R/W R/W R/W
bit4 bit3 bit2
BVAL4 BVAL3 BVAL2 BVAL1
R/W R/W R/W
bit9 bit8 BVRLR1(Upper)
BVAL8 Reset value
0 0 0 0 0 0 0 0
R/W R/W
bit1 bit0 BVRLR1(Lower)
BVAL0 Reset value
0 0 0 0 0 0 0 0
R/W R/W
B
B
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