Fujitsu F2MCTM-16LX Hardware Manual page 257

Details of pins in block diagram
There are two channels for 16-bit reload timer.
The actual pin names, outputs to resources, and interrupt request numbers for each channel are as follows:
Table 14.2-1 Pin Names, Outputs to Resources, and Interrupt Request Numbers of 16-bit
Reload Timer
TIN pin
TOT pin
Output to resources
Interrupt request number
Count clock generator
The count clock generator generates a count clock supplied to the 16-bit timer register (TMR) on the basis
of the machine clock or external event clock.
Reload controller
When the 16-bit reload timer starts operation or the TMR underflows, the reload controller reloads the
value set in the 16-bit reload register (TMRLR) to the TMR.
Output controller
The output controller inverts and enables or disables the output of the TOT pin at underflow.
Operation controller
The operation controller starts or stops the 16-bit reload timer.
16-bit timer register (TMR)
The 16-bit timer register (TMR) is a 16-bit down counter. At read, the value being counted is read.
16-bit reload register (TMRLR)
The 16-bit reload register (TMRLR) sets the interval time of the 16-bit reload timer. When the 16-bit reload
timer starts operation or the 16-bit timer register (TMR) underflows, the value set in the TMRLR is
reloaded to the TMR.
Timer control status register (TMCSR)
The timer control status register (TMCSR) selects the operation mode, sets the operation conditions, selects
the start trigger, performs a start using the software trigger, selects the reload operation mode, enables or
disables an interrupt request, sets the output level of the TOT pin, and sets the TOT output pin of the 16-bit
reload timer.
CHAPTER 14 16-BIT RELOAD TIMER
Reload timer 2
P82
P83
-
#19(13 )
H
Reload timer 3
P53
P54
-
#20(14 )
H
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