Fujitsu F2MCTM-16LX Hardware Manual page 248

CHAPTER 13 16-Bit I/O TIMER
φ
Counter value
Input capture input
Capture signal
Capture register
φ
: Machine clock
Figure 13.6-3 Operation of Input Capture (Rising edge/falling edge)
Counter value
F F F F
B F F F
7 F F F
3 F F F
0 0 0 0
Reset
INn (rising edge)
INm (falling edge)
Capture n
Capture m
Counter value
F F F F
B F F F
7 F F F
3 F F F
0 0 0 0
Reset
INn (both edge)
Capture example
232
Figure 13.6-2 Timing of Fetching Data for Input Capture
H
H
H
H
H
Undefined
3FFF
Undefined
Figure 13.6-4 Operation of Input Capture (both edges)
H
H
H
H
H
Undefined
N
Valid edge
H
BFFF 3FFF
H
N+1
N+1
Data fetch
Time
7FFF
H
n = 0, 2 m = n+1
Time
H
n = 0 to 3