Operating State Of 16-Bit Timer Register - Fujitsu F2MCTM-16LX Hardware Manual

Operating State of 16-bit Timer Register

The operating state of the 16-bit timer register is determined by the timer operation enable bit in the timer
control status register (TMCSR:CNTE) and the WAIT signal. The operating states include the stop state,
start trigger input wait state (WAIT state), and RUN state.
Figure 14.5-3 shows the state transition diagram for the 16-bit timer registers.
Reset
CNTE=0
WAIT state
CNTE=1, WAIT=1
TIN pin: only trigger input is valid
TOUT pin: outputs value of 16-bit
reload register
16-bit timer register:retains the value at stop
the value immediately
after resetting is undefined
TRG=1
(software trigger)
External trigger from TIN
: State transition by hardware
: State transition by register access
: WAIT signal (internal signal)
WAIT
TRG : Software trigger bit (TMCSR)
CNTE : Timer operation enable bit (TMCSR)
: Underflow generating flag bit (TMCSR)
UF
: Reload select bit (TMCSR)
RELD
Figure 14.5-3 State Transition Diagram
STOP state
CNTE=0, WAIT=1
TIN pin: Input disable
TOUT pin: General-purpose I/O port
16-bit timer register:retain the value at stop
the value immediately after
resetting is undefined
CNTE=1
TRG=0
UF=1&
RELD=0
(one-shot mode)
LOAD CNTE=1, WAIT=0
Loads 16-bit reload register value to
16-bit timer register
CHAPTER 14 16-BIT RELOAD TIMER
CNTE=0
CNTE=1
TRG=1
RUN state
CNTE=1, WAIT=0
TIN pin:function as input pin of 16-bit
reload timer
TOUT pin:function as output pin of
16-bit reload timer
16-bit timer register: operation
UF=1&
RELD=1
(reload mode)
TRG=1
(software trigger)
Load ended
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