Fujitsu F2MCTM-16LX Hardware Manual page 600

APPENDIX
I/O direct bit addressing (io:bp)
Specify bits in physical addresses 000000
where the larger number indicates the most significant bit (MSB) and the lower number indicates the least
significant bit (LSB).
SETB I:0C1H:0
Abbreviated direct bit addressing (dir:bp)
Specify the eight low-order bits of a memory address explicitly in an operand. Address bits 8 to 15 are
specified by the direct page register (DPR). Address bits 16 to 23 are specified by the data bank register
(DTB). Bit positions are indicated by ":bp", where the larger number indicates the most significant bit
(MSB) and the lower number indicates the least significant bit (LSB).
Figure B.3-9 Example of Abbreviated Direct Bit Addressing (dir:bp)
SETB S:10H:0
Direct bit addressing (addr16:bp)
Specify arbitrary bits in 64K bytes explicitly. Address bits 16 to 23 are specified by the data bank register
(DTB). Bit positions are indicated by ":bp", where the larger number indicates the most significant bit
(MSB) and the lower number indicates the least significant bit (LSB).
SETB 2222H:0
584
Figure B.3-8 Example of I/O Direct Bit Addressing (io:bp)
(This instruction sets bits by I/O direct bit addressing.)
Before execution
After execution
(This instruction sets bits by abbreviated direct bit addressing.)
Before execution
DTB
After execution
DTB
Figure B.3-10 Example of Direct Bit Addressing (addr16:bp)
(This instruction sets bits by direct bit addressing.)
Before execution
DTB
After execution DTB
to 0000FF explicitly. Bit positions are indicated by ":bp",
H H
Memory space
0000C1H 0 0
0000C1H 0 1
5 5 DPR 6 6 556610H
5 5 DPR 6 6 556610H
5 5 552222H
5 5 552222H
Memory space
0 0
Memory space
0 1
Memory space
0 0
Memory space
0 1