Fujitsu F2MCTM-16LX Hardware Manual page 494

CHAPTER 21 CAN CONTROLLER
Register Function
Table 21.4-7 Selection of Acceptance Mask
AMSx.1
0 0
0 1
1 0
1 1
Notes:
• AMSx.1 and AMSx.0 should be set when the message buffer (x) is invalid (BVALx of the message
buffer valid register (BVALR) is 0). Setting when the buffer is valid (BVALx = 1) may cause
unnecessary received messages to be stored.
• To invalidate the message buffer (by setting the BVALR: BVAL bit to 0) while the CAN controller is
operating for CAN communication (the read value of the CSR: HALT bit is 0 and the CAN controller is
operating for CAN bus communication to enable transmission and reception), follow the procedure in
"21.13 Precautions when Using CAN Controller".
478
AMSx.0
Full-bit comparison
Full-bit mask
Acceptance mask register 0 (AMR0)
Acceptance mask register 1 (AMR1)
Acceptance Mask