Software Interrupts
Interrupts requested by executing the INT instruction are software interrupts. An interrupt request by the
INT instruction does not have an interrupt request or enable flag. An interrupt request is issued always by
executing the INT instruction.
No interrupt level is assigned to the INT instruction. Therefore, ILM is not updated when the INT
instruction is used. Instead, the I flag is cleared and the continuing interrupt requests are suspended.
F
Save
Extended Intelligent I/O Service (EI
The extended intelligent I/O service automatically transfers data between an internal resource and memory.
This processing is traditionally performed by an interrupt processing program, but the EI
to be transferred in a manner similar to a DMA (direct memory access) operation.
To activate the extended intelligent I/O service function from an internal resource, the interrupt control
register (ICR) of the interrupt controller must have an extended intelligent I/O service enable flag (ISE).
The extended intelligent I/O service is started when an interrupt request occurs with 1 specified in the ISE
flag. To generate a normal interrupt using a hardware interrupt request, set the ISE flag to 0.
Figure 3.1-3 Overview of the Extended Intelligent I/O Service (EI
CPU
Figure 3.1-2 Overview of Software Interrupts
Register
file
Micro
code
IR
2
MC-16LX
CPU
RAM
2
OS)
Memory space
IOA
I/O register
(3)
ISD
(3)
BAP
(4)
Buffer
PS : Processor status
I
PS
I
S
ILM : Interrupt level mask register
IR
B unit
B unit : Bus interface unit
Queue
Fetch
Instruction bus
I/O register
Interrupt request
ICS
Interrupt control register
(2)
Interrupt controller
(1) I/O requests transfer.
(2) Interrupt controller selects descriptor.
(3) Transfer source and destination are read
DCT
from descriptor.
(4) Data is transferred between I/O and
memory.
CHAPTER 3 INTERRUPTS
: Interrupt enable flag
: Instruction register
2
OS enables data
2
OS)
Peripheral
(1)
57
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