Delayed Interrupt Request Generate/Cancel Register (Dirr) - Fujitsu F2MCTM-16LX Hardware Manual

16-bit microcontroller
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4.3.1
Delayed interrupt request generate/cancel register
(DIRR)
The delayed interrupt request generate/cancel register (DIRR) generates or cancels a
delayed interrupt request.

Delayed Interrupt Request Generate/cancel Register (DIRR)

Figure 4.3-2 Delayed Interrupt Request Generate/cancel Register (DIRR)
Address
15
00009F
H
: Undefined
R/W
: Read/Write R/W
: Reset value
Table 4.3-1 Functions of Delayed Interrupt Request Generate/Cancel Register (DIRR)
bit8
bit9
to
bit15
14
13
12
11
10
Bit name
R0:
This bit generates or cancels a delayed interrupt request.
Delayed interrupt
When set to "0": Cancels delayed interrupt request
request generate bit
When set to "1": Generates delayed interrupt request
Undefined bits
Read: The value is undefined.
Write: No effect
CHAPTER 4 DELAYED INTERRUPT GENERATION MODULE
9
8
Reset value
R0
XXXXXXX0
B
R/W
bit8
R0
Delayed interrupt request generate bit
0
Release of delay interrupt request
1
Generation of delay interrupt request
Function
87

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