8.6
Status Change Diagram
Figure 8.6-1 shows the operation status and status transition in the clock mode and
standby mode of the MB90360 series.
Status Change Diagram
Power-on
Power-on reset
Terminate of oscillation
stabilization wait
Figure 8.6-1 Status Change Diagram
Drop power supply voltage
(4.0 V)
External reset, Watchdog timer reset, Software reset,
Clock supervisor reset, CPU operation detection reset
Low voltage
detection reset
Main clock mode
SLP=1
Interrupt
Main sleep mode
TMD=0
Interrupt
Main timebase timer
mode
STP=1
Main stop mode
Interrupt
Terminate of oscillation
stabilization wait
Main clock
oscillation stabilization
wait
CHAPTER 8 LOW-POWER CONSUMPTION MODE
Reset
SCS=1
MCS=0
SCS=0
PLL clock mode
MCS=1
SCS=1
SLP=1
Interrupt
PLL sleep mode
TMD=0
Interrupt
PLL timebase timer
mode
STP=1
PLL stop mode
Interrupt
Terminate of oscillation
stabilization wait
Main clock
oscillation stabilization
wait
SCS=0
Subclock mode
SLP=1
Interrupt
Subsleep mode
TMD=0
Interrupt
Watch mode
STP =1
Substop mode
Interrupt
Terminate of oscillation
stabilization wait
Subclock
oscillation stabilization
wait
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