Fujitsu F2MCTM-16LX Hardware Manual page 344

16-bit microcontroller
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CHAPTER 17 DTP/EXTERNAL INTERRUPTS
Setting procedure
To use the DTP/external interrupt, set each register by using the following procedure:
1. Set the input port to the general-purpose I/O port, which is shared with the terminal to be used as
external interrupt input.
2. Set the external interrupt factor select register (EISSR) corresponding to the DTP/external interrupt
channel to be used.
3. Set the interrupt request enable bit corresponding to the DTP/external interrupt channel to be used to 0
(ENIR1:EN).
4. Use the detection condition select bit corresponding to the DTP/external interrupt pin to be used to set
the edge or level to be detected (ELVR1: LA, LB).
5. Set the interrupt request flag bit corresponding to the DTP/external interrupt channel to be used to 0
(EIRR1: ER).
6. Set the interrupt request enable bit corresponding to the DTP/external interrupt channel to be used to 1
(ENIR1: EN).
Note that concurrent writing with 16-bit data is available in 5 and 6.
• When setting the registers for the DTP/external interrupt, the external interrupt request must be disabled
in advance (ENIR1: EN = 0).
• When enabling the DTP/external interrupt request (ENIR1:EN = 1), the corresponding DTP/external
interrupt request flag bit must be cleared in advance (EIRR1:ER = 0). These actions prevent the
mistaken interrupt request from occurring when setting the register.
Selecting of DTP or external interrupt function
Whether the DTP function or the external interrupt function is executed depends on the setting of the
2
EI
OS enable bit in the corresponding interrupt control register (ICR:ISE).
If the ISE bit is set to "1", the EI
If the ISE bit is set to "0", the EI
Notes:
• All interrupt requests assigned to one interrupt control register have the same interrupt levels (IL2 to
IL0).
• If two or more interrupt requests are assigned to one interrupt control register and the EI
one of them, other interrupt requests cannot be used.
• Enabling unequipped terminals causes a false operation. First set the EISSR and then set each of the
registers when DTP/external interrupt is used.
328
2
OS is enabled.
2
OS is disabled and the external interrupt function is executed.
2
OS is used in

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