Fujitsu F2MCTM-16LX Hardware Manual page 598

APPENDIX
Physical direct branch addressing (addr24)
Specify an offset explicitly for the branch destination address. The size of the offset is 24 bits. Physical
direct branch addressing is used for unconditional branch, subroutine call, or software interrupt instruction.
JMPP 333B20H
Before execution
After execution
I/O direct addressing (io)
Specify an 8-bit offset explicitly for the memory address in an operand. The I/O address space in the
physical address space from 000000H to 0000FFH is accessed regardless of the data bank register (DTB)
and direct page register (DPR). A bank select prefix for bank addressing is invalid if specified before an
instruction using I/O direct addressing.
MOVW A, i:0C0H (This instruction reads data by I/O direct addressing and stores it in A.)
Before execution
After execution
582
Figure B.3-4 Example of Direct Branch Addressing (addr24)
(This instruction causes an unconditional branch by direct branch 24-bit
addressing.)
PC 3 C 2 0
PC 3 B 2 0
Figure B.3-5 Example of I/O Direct Addressing (io)
A 0 7 1 6 2 5 3 4
A 2 5 3 4 F F E E
PCB 4 F
Memory space
4F3C23H
4F3C22H
4F3C21H
4F3C20H
PCB 3 3
333B20H Next instruction
0000C1H
0000C0H
3 3
3 B
2 0
6 3 JMPP 333B20H
Memory space
F F
E E