ST STM32WL5 Series Reference Manual page 358

Advanced arm-based 32-bit mcus with sub-ghz radio solution
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Reset and clock control (RCC)
Off-
Register
set
RCC_
AHB1RSTR
0x028
Reset value
RCC_
AHB2RSTR
0x02C
Reset value
RCC_
AHB3RSTR
0x030
Reset value
0x034
Reserved
RCC_
APB1RSTR1
0x038
0
Reset value
RCC_
APB1RSTR2
0x03C
Reset value
RCC_
APB2RSTR
0x040
Reset value
RCC_
APB3RSTR
0x044
Reset value
358/1461
Table 63. RCC register map and reset values (continued)
0
0
0 0 0
0 0 0 0 0
Reserved
0
0
0 0
0
RM0453 Rev 1
0
0
0 0
0 0
0
RM0453
0 0 0
0 0 0
0
0
0

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