Figure 26. Simplified Diagram Of The Reset Circuit - ST STM32WL5 Series Reference Manual

Reset and clock control (RCC)
In case on an internal reset, the internal pull-up R
power consumption through the pull-up resistor.
External
reset
1) The sub-GHz radio protocol error reset is available in non LoRa devices only, STM32WL54xx.
Software reset
The SYSRESETREQ bit in CPU1 application interrupt and reset control register may be set
to force a software reset on the device (refer to the programming manual STM32 Cortex
M4 MCUs and MPUs (PM0214)).
The SYSRESETREQ bit in CPU2 application interrupt and reset control register may be set
to force a software reset on the device.
Low-power mode security reset
To prevent that critical applications mistakenly enter a low-power mode, two low-power
mode security resets are available.
If enabled in option bytes, the resets are generated in the following conditions:
• Entering Standby mode: this type of reset is enabled by resetting nRST_STDBY bit in
user option bytes. In this case, whenever a Standby mode entry sequence is
successfully executed, the device is reset instead of entering Standby mode.
•
Entering Stop mode: this type of reset is enabled by resetting nRST_STOP bit in user
option bytes. In this case, whenever a Stop mode entry sequence is successfully
executed, the device is reset instead of entering Stop mode.
•
Entering Shutdown mode: this type of reset is enabled by resetting nRST_SHDW bit in
user option bytes. In this case, whenever a Shutdown mode entry sequence is
successfully executed, the device is reset instead of entering Shutdown mode.
For further information on the user option bytes, refer to
description.
Option byte loader reset
The option byte loader reset is generated when the OBL_LAUNCH bit is set in the
FLASH_CR register. This bit is used to launch the option byte loading by software.
278/1461

Figure 26. Simplified diagram of the reset circuit

V
R
PU
NRST
PU
DD
Filter
Pulse
generator
(min 20 μs)
RM0453 Rev 1
is deactivated in order to save the
WWDG reset
IWDG reset
Radio protocol error reset
CPU1 software reset
CPU2 software reset
Low-power manager reset
Option byte loader reset
BOR reset
Section 4.4.1: Option bytes
RM0453
System reset
(1)
MSv62602V1
®
-