Syscfg External Interrupt Configuration Register 2; (Syscfg_Exticr2) - ST STM32WL5 Series Reference Manual

RM0453
Bits 6:4 EXTI1[2:0]: EXTI1 configuration bits
Bit 3 Reserved, must be kept at reset value.
Bits 2:0 EXTI0[2:0]: EXTI0 configuration bits
Note: Some of the I/O pins mentioned in this register may not be available on small packages.
11.2.4

SYSCFG external interrupt configuration register 2

(SYSCFG_EXTICR2)

Address offset: 0x00C
Reset value: 0x0000 0000
31 30 29
Res. Res. Res. Res.
15 14 13
Res. EXTI7[2:0]
rw rw
Bits 31:15 Reserved, must be kept at reset value.
Bits 14:12 EXTI7[2:0]: EXTI7 configuration bits
These bits are written by software to select the source input for the EXTI7 external interrupt.
000: PA7 pin
001: PB7 pin
010: Reserved
011: Reserved
100: Reserved
101: Reserved
110: Reserved
111: Reserved
Bit 11 Reserved, must be kept at reset value.
These bits are written by software to select the source input for the EXTI1 external interrupt.
000: PA1 pin
001: PB1 pin
010: PC1 pin
011: Reserved
100: Reserved
101: Reserved
110: Reserved
111: Reserved
These bits are written by software to select the source input for the EXTI0 external interrupt.
000: PA0 pin
001: PB0 pin
010: PC0 pin
011: Reserved
100: Reserved
101: Reserved
110: Reserved
111: Reserved
28 27 26 25
Res. Res. Res.
12 11 10 9
Res. EXTI6[2:0]
rw rw rw
System configuration controller (SYSCFG)
24 23 22
Res. Res. Res.
8 7 6
Res. EXTI5[2:0]
rw rw
RM0453 Rev 1
21 20 19 18
Res. Res. Res. Res.
5 4 3 2
Res.
rw rw rw
17 16
Res. Res.
1 0
EXTI4[2:0]
rw rw
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