ST STM32WL5 Series Reference Manual page 338

Reset and clock control (RCC)
Bit 31 LPWRRSTF: Low-power reset flag
Bit 30 WWDGRSTF: Window watchdog reset flag
Bit 29 IWDGRSTF: Independent window watchdog reset flag
Bit 28 SFTRSTF: Software reset flag
Bit 27 BORRSTF: BOR flag
Bit 26 PINRSTF: Pin reset flag
Bit 25 OBLRSTF: Option byte loader reset flag
Bit 24 RFILARSTF: Sub-GHz radio illegal command flag
Bit 23 RMVF: Remove reset flag
Bits 22:16 Reserved, must be kept at reset value.
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This bit is set by hardware when a reset occurs due to illegal Stop, Standby or Shutdown
mode entry. It is cleared by writing to the RMVF bit.
0: No illegal mode reset occurred
1: Illegal mode reset occurred
This bit is set by hardware when a window watchdog reset occurs. It is cleared by writing to
the RMVF bit.
0: No window watchdog reset occurred
1: Window watchdog reset occurred
This bit is set by hardware when an independent watchdog reset domain occurs. It is cleared
by writing to the RMVF bit.
0: No independent watchdog reset occurred
1: Independent watchdog reset occurred
This bit is set by hardware when a software reset occurs. It is cleared by writing to the RMVF
bit.
0: No software reset occurred
1: Software reset occurred
This bit is set by hardware when a BOR occurs. It is cleared by writing to the RMVF bit.
0: No BOR occurred
1: BOR occurred
This bit is set by hardware when a reset from the NRST pin occurs. It is cleared by writing to
the RMVF bit.
0: No reset from NRST pin occurred
1: Reset from NRST pin occurred
This bit is set by hardware when a reset from the option byte loading occurs. It is cleared by
writing to the RMVF bit.
0: No reset from option byte loading occurred
1: Reset from option byte loading occurred
This bit is set by hardware when a illegal sub-GHz radio command is sent. It is cleared by
writing to the RMVF bit.
0: No sub-GHz radio illegal command occurred
1: Sub-GHz radio illegal command occurred
This bit is set by software to clear the reset flags LPWRRSTF, WWDGRSTF, IWDGRSTF,
SFTRSTF, BORRSTF, PINRSTF, OBLRSTF and RFILARSTF.
0: No effect
1: Reset flags reset
RM0453 Rev 1
RM0453