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RM0453
Bit 23 I2C3RST: I2C3 reset
Bit 22 I2C2RST: I2C2 reset
Bit 21 I2C1RST: I2C1 reset
Bits 20:18 Reserved, must be kept at reset value.
Bit 17 USART2RST: USART2 reset
Bits 16:15 Reserved, must be kept at reset value.
Bit 14 SPI2S2RST: SPI2S2 reset
Bits 13:1 Reserved, must be kept at reset value.
Bit 0 TIM2RST: TIM2 timer reset
7.4.12
RCC APB1 peripheral reset register 2 (RCC_APB1RSTR2)
Address offset: 0x03C
Reset value: 0x0000 0000
Access: no wait state, word, half-word and byte access
31
30
29
Res.
Res.
Res.
15
14
13
Res.
Res.
Res.
This bit is set and cleared by software.
0: No effect
1: I2C3 reset
This bit is set and cleared by software.
0: No effect
1: I2C2 reset
This bit is set and cleared by software.
0: No effect
1: I2C1 reset
This bit is set and cleared by software.
0: No effect
1: USART2 reset
This bit is set and cleared by software.
0: No effect
1: SPI2S2 reset
This bit is set and cleared by software.
0: No effect
1: TIM2 reset
28
27
26
25
Res.
Res.
Res.
Res.
12
11
10
9
Res.
Res.
Res.
Res.
24
23
22
Res.
Res.
Res.
8
7
6
Res.
Res.
rw
RM0453 Rev 1
Reset and clock control (RCC)
21
20
19
18
Res.
Res.
Res.
Res.
5
4
3
2
Res.
Res.
Res.
rw
17
16
Res.
Res.
1
0
Res.
rw
315/1461
364
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