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ST STM32WL5 Series Reference Manual page 363

Advanced arm-based 32-bit mcus with sub-ghz radio solution

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RM0453

Off-

Register

set

RCC_C2

AHB1SMENR

0x168

Reset value

RCC_C2

AHB2SMENR

0x16C

Reset value

RCC_C2

AHB3SMENR

0x170

Reset value

0x174

Reserved

RCC_C2

APB1

0x178

SMENR1

1

Reset value

RCC_C2

APB1

0x17C

SMENR2

Reset value

RCC_C2

APB2SMENR

0x180

Reset value

Table 63. RCC register map and reset values (continued)

1 1 1

1

1 1 1

1 1 1

Reserved

1

1

1 1

1

RM0453 Rev 1

Reset and clock control (RCC)

1

1

1

1 1

1 1

1

1 1 1

1 1 1

1

1

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