RM0090
Note:
The capture prescaler is not used for triggering, so you don't need to configure it.
3.
Select rising edge polarity by writing CC2P=0 and CC2NP=0 in the TIMx_CCER
register.
4.
Configure the timer in external clock mode 1 by writing SMS=111 in the TIMx_SMCR
register.
5.
Select TI2 as the input source by writing TS=110 in the TIMx_SMCR register.
6.
Enable the counter by writing CEN=1 in the TIMx_CR1 register.
When a rising edge occurs on TI2, the counter counts once and the TIF flag is set.
The delay between the rising edge on TI2 and the actual clock of the counter is due to the
resynchronization circuit on TI2 input.
External clock source mode 2
This mode is selected by writing ECE=1 in the TIMx_SMCR register.
The counter can count at each rising or falling edge on the external trigger input ETR.
Figure 157
ETR pin
Figure 156. Control circuit in external clock mode 1
CNT_EN
Counter clock = CK_CNT = CK_PSC
Counter register
gives an overview of the external trigger input block.
Figure 157. External trigger input block
ETR
0
divider
/1, /2, /4, /8
1
ETP
ETPS[1:0]
TIMx_SMCR
TIMx_SMCR
DocID018909 Rev 11
General-purpose timers (TIM2 to TIM5)
TI2
34
TIF
Write TIF=0
ETRP
filter
downcounter
CK_INT
ETF[3:0]
TIMx_SMCR
35
36
TI2F
or
or
or
TI1F
encoder
mode
TRGI
external clock
mode 1
ETRF
external clock
mode 2
CK_INT
internal clock
mode
(internal clock)
ECE
SMS[2:0]
TIMx_SMCR
CK_PSC
595/1731
640
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