Table 61. Vector Table For Stm32F405Xx/07Xx And Stm32F415Xx/17Xx - STMicroelectronics STM32F405 Reference Manual

Interrupts and events

Table 61. Vector table for STM32F405xx/07xx and STM32F415xx/17xx

Type of
priority
- -
-3 fixed
-2 fixed
-1 fixed
0 settable
1 settable
2 settable
- -
3 settable
4 settable
- -
5 settable
6 settable
0 7 settable
1 8 settable
2 9 settable
3 10 settable
4 11 settable
5 12 settable
6 13 settable
7 14 settable
8 15 settable
9 16 settable
10 17 settable
11 18 settable
374/1731
Acronym
-
Reset
NMI
HardFault
MemManage
BusFault
UsageFault
-
SVCall
Debug Monitor
-
PendSV
SysTick
WWDG
PVD
TAMP_STAMP
RTC_WKUP
FLASH
RCC
EXTI0
EXTI1
EXTI2
EXTI3
EXTI4
DMA1_Stream0
DocID018909 Rev 11
Description
Reserved
Reset
Non maskable interrupt. The RCC
Clock Security System (CSS) is linked
to the NMI vector.
All class of fault
Memory management
Pre-fetch fault, memory access fault
Undefined instruction or illegal state
Reserved
System service call via SWI
instruction
Debug Monitor
Reserved
Pendable request for system service
System tick timer
Window Watchdog interrupt
PVD through EXTI line detection
interrupt
Tamper and TimeStamp interrupts
through the EXTI line
RTC Wakeup interrupt through the
EXTI line
Flash global interrupt
RCC global interrupt
EXTI Line0 interrupt
EXTI Line1 interrupt
EXTI Line2 interrupt
EXTI Line3 interrupt
EXTI Line4 interrupt
DMA1 Stream0 global interrupt
RM0090
Address
0x0000 0000
0x0000 0004
0x0000 0008
0x0000 000C
0x0000 0010
0x0000 0014
0x0000 0018
0x0000 001C - 0x0000
002B
0x0000 002C
0x0000 0030
0x0000 0034
0x0000 0038
0x0000 003C
0x0000 0040
0x0000 0044
0x0000 0048
0x0000 004C
0x0000 0050
0x0000 0054
0x0000 0058
0x0000 005C
0x0000 0060
0x0000 0064
0x0000 0068
0x0000 006C