RM0090
5.6
PWR register map
The following table summarizes the PWR registers.
Table 31. PWR - register map and reset values for STM32F405xx/07xx and STM32F415xx/17xx
Offset
Register
PWR_CR
0x000
Reset value
PWR_CSR
0x004
Reset value
Table 32. PWR - register map and reset values for STM32F42xxx and STM32F43xxx
Offset
Register
PWR_CR
0x000
Reset value
PWR_CSR
0x004
Reset value
Refer to
Reserved
Reserved
Reserved
Reserved
Table 1 on page 64
for the register boundary addresses.
DocID018909 Rev 11
Reserved
1
Reserved
0
1
1
1
1
1
1
0
1
Reserved
0
0
0
0
0
Power controller (PWR)
PLS[2:0]
0
0
0
0
0
0
0
0
Reserved
0
0
0
0
PLS[2:0]
1
0
0
0
0
0
0
0
0
Reserved
0
0
0
0
149/1731
0
0
0
0
0
0
0
0
149
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