STMicroelectronics STM32F405 Reference Manual page 194

Reset and clock control for STM32F42xxx and STM32F43xxx (RCC)
Bit 31 UART8LPEN: UART8 clock enable during Sleep mode
Bit 30 UART7LPEN: UART7 clock enable during Sleep mode
Bit 29 DACLPEN: DAC interface clock enable during Sleep mode
Bit 28 PWRLPEN: Power interface clock enable during Sleep mode
Bit 27 Reserved, must be kept at reset value.
Bit 26 CAN2LPEN: CAN 2 clock enable during Sleep mode
Bit 25 CAN1LPEN: CAN 1 clock enable during Sleep mode
Bit 24 Reserved, must be kept at reset value.
Bit 23 I2C3LPEN: I2C3 clock enable during Sleep mode
Bit 22 I2C2LPEN: I2C2 clock enable during Sleep mode
Bit 21 I2C1LPEN: I2C1 clock enable during Sleep mode
Bit 20 UART5LPEN: UART5 clock enable during Sleep mode
Bit 19 UART4LPEN: UART4 clock enable during Sleep mode
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This bit is set and cleared by software.
0: UART8 clock disabled during Sleep mode
1: UART8 clock enabled during Sleep mode
This bit is set and cleared by software.
0: UART7 clock disabled during Sleep mode
1: UART7 clock enabled during Sleep mode
This bit is set and cleared by software.
0: DAC interface clock disabled during Sleep mode
1: DAC interface clock enabled during Sleep mode
This bit is set and cleared by software.
0: Power interface clock disabled during Sleep mode
1: Power interface clock enabled during Sleep mode
This bit is set and cleared by software.
0: CAN 2 clock disabled during sleep mode
1: CAN 2 clock enabled during sleep mode
This bit is set and cleared by software.
0: CAN 1 clock disabled during Sleep mode
1: CAN 1 clock enabled during Sleep mode
This bit is set and cleared by software.
0: I2C3 clock disabled during Sleep mode
1: I2C3 clock enabled during Sleep mode
This bit is set and cleared by software.
0: I2C2 clock disabled during Sleep mode
1: I2C2 clock enabled during Sleep mode
This bit is set and cleared by software.
0: I2C1 clock disabled during Sleep mode
1: I2C1 clock enabled during Sleep mode
This bit is set and cleared by software.
0: UART5 clock disabled during Sleep mode
1: UART5 clock enabled during Sleep mode
This bit is set and cleared by software.
0: UART4 clock disabled during Sleep mode
1: UART4 clock enabled during Sleep mode
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