STMicroelectronics STM32F405 Reference Manual page 484

LCD-TFT Controller (LTDC)
When the LTDC is disabled, the timing generator block is reset to X=Total Width - 1,
Y=Total Height - 1 and held the last pixel before the vertical synchronization phase and the
FIFO are flushed. Therefore only blanking data is output continuously.
Example of Synchronous timings configuration:
TFT-LCD timings (should be extracted from Panel datasheet):
•
Horizontal and Vertical Synchronization width: 0x8 pixels and 0x4 lines
•
Horizontal and Vertical back porch: 0x7 pixels and 0x2 lines
•
Active Width and Active Height: 0x280 pixels, 0x1E0 lines (640x480)
•
Horizontal front porch: 0x6 pixels
•
Vertical front porch: 0x2 lines
The programmed values in the LTDC Timings registers will be:
• LTDC_SSCR register: to be programmed to 0x00070001. (
VSH[10:0] is 0x3)
•
LTDC_BPCR register: to be programmed to 0x000E0005. (AHBP[11:0] is 0xE(0x8 +
0x6) and AVBP[10:0] is 0x5(0x4 + 0x1))
•
LTDC_AWCR register: to be programmed to 0x028E01E5. (AAW[11:0] is 0x28E(0x8
+0x7 +0x27F) and AAH[10:0] is 0x1E5(0x4 +0x2 + 0x1DF)
• LTDC_TWCR register: to be programmed to 0x00000294. (TOTALW[11:0] is
0x294(0x8 +0x7 +0x280 + 0x5)
•
LTDC_THCR register: to be programmed to 0x000001E7. (TOTALH[10:0] is
0x1E7(0x4 +0x2 + 0x1E0 + 1)
Programmable polarity
The Horizontal and Vertical Synchronization, Data Enable and Pixel Clock output signals
polarity can be programmed to active high or active low through the LTDC_GCR register.
Background Color
A constant background color (RGB888) can programmed through the LTDC_BCCR
register. It is used for blending with the bottom layer.
Dithering
The Dithering pseudo-random technique using an LFSR is used to add a small random
value (threshold) to each pixel color channel (R, G or B) value, thus rounding up the MSB in
some cases when displaying a 24-bit data on 18-bit display. Thus the Dithering technique is
used to round data which is different from one frame to the other.
The Dither pseudo-random technique is the same as comparing LSBs against a threshold
value and adding a 1 to the MSB part only, if the LSB part is >= the threshold. The LSBs are
typically dropped once dithering was applied.
The width of the added pseudo-random value is 2 bits for each color channel; 2 bits for Red,
2 bits for Green and 2 bits for Blue.
Once the LCD-TFT controller is enabled, the LFSR starts running with the first active pixel
and it is kept running even during blanking periods and when dithering is switched off. If the
LTDC is disabled, the LFSR is reset.
The Dithering can be switched On and Off on the fly through the LTDC_GCR register.
484/1731 DocID018909 Rev 11
RM0090
[11:0] is 0x7 and
HSW