STMicroelectronics STM32F405 Reference Manual page 266

Reset and clock control for STM32F405xx/07xx and STM32F415xx/17xx(RCC)
Bits 27:15 Reserved, must be kept at reset value.
Bits 14:6 PLLI2SN: PLLI2S multiplication factor for VCO
Caution: The software has to set these bits correctly to ensure that the VCO output
Note: Multiplication factors ranging from 50 and 99 are possible for VCO input frequency
Bits 5:0 Reserved, must be kept at reset value.
266/1731
These bits are set and cleared by software to control the multiplication factor of the VCO.
These bits can be written only when PLLI2S is disabled. Only half-word and word accesses
are allowed to write these bits.
frequency is between 100 and 432 MHz.
VCO output frequency = VCO input frequency × PLLI2SN with 50 ≤ PLLI2SN ≤ 432
000000000: PLLI2SN = 0, wrong configuration
000000001: PLLI2SN = 1, wrong configuration
...
000110010: PLLI2SN = 50
...
001100011: PLLI2SN = 99
001100100: PLLI2SN = 100
001100101: PLLI2SN = 101
001100110: PLLI2SN = 102
...
110110000: PLLI2SN = 432
110110001: PLLI2SN = 433, wrong configuration
...
111111111: PLLI2SN = 511, wrong configuration
higher than 1 MHz. However care must be taken that the minimum VCO output
frequency respects the value specified above.
DocID018909 Rev 11
RM0090