STMicroelectronics STM32F405 Reference Manual page 260

Reset and clock control for STM32F405xx/07xx and STM32F415xx/17xx(RCC)
Bit 10 ADC3LPEN: ADC 3 clock enable during Sleep mode
Bit 9 ADC2LPEN: ADC2 clock enable during Sleep mode
Bit 8 ADC1LPEN: ADC1 clock enable during Sleep mode
Bits 7:6 Reserved, must be kept at reset value.
Bit 5 USART6LPEN: USART6 clock enable during Sleep mode
Bit 4 USART1LPEN: USART1 clock enable during Sleep mode
Bits 3:2 Reserved, must be kept at reset value.
Bit 1 TIM8LPEN: TIM8 clock enable during Sleep mode
Bit 0 TIM1LPEN: TIM1 clock enable during Sleep mode
260/1731
Set and cleared by software.
0: ADC 3 clock disabled during Sleep mode
1: ADC 3 clock disabled during Sleep mode
Set and cleared by software.
0: ADC2 clock disabled during Sleep mode
1: ADC2 clock disabled during Sleep mode
Set and cleared by software.
0: ADC1 clock disabled during Sleep mode
1: ADC1 clock disabled during Sleep mode
Set and cleared by software.
0: USART6 clock disabled during Sleep mode
1: USART6 clock enabled during Sleep mode
Set and cleared by software.
0: USART1 clock disabled during Sleep mode
1: USART1 clock enabled during Sleep mode
Set and cleared by software.
0: TIM8 clock disabled during Sleep mode
1: TIM8 clock enabled during Sleep mode
Set and cleared by software.
0: TIM1 clock disabled during Sleep mode
1: TIM1 clock enabled during Sleep mode
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