Figure 137. Counter Timing Diagram, Internal Clock Divided By 1; Figure 138. Counter Timing Diagram, Internal Clock Divided By 2; Figure 139. Counter Timing Diagram, Internal Clock Divided By 4 - STMicroelectronics STM32F405 Reference Manual

General-purpose timers (TIM2 to TIM5)
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Figure 137. Counter timing diagram, internal clock divided by 1

CK_INT
CNT_EN
Timer clock = CK_CNT
Counter register
Counter overflow
Update event (UEV)
Update interrupt flag (UIF)

Figure 138. Counter timing diagram, internal clock divided by 2

CK_INT
CNT_EN
Timer clock = CK_CNT
Counter register
Counter overflow
Update event (UEV)
Update interrupt flag (UIF)

Figure 139. Counter timing diagram, internal clock divided by 4

CK_INT
CNT_EN
TImer clock = CK_CNT
Counter register
Counter overflow
Update event (UEV)
Update interrupt flag (UIF)
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