STMicroelectronics STM32F405 Reference Manual page 289

RM0090
Offset Register
GPIOx_
OTYPER
(where x =
0x04
A..I/J/K)
Reset value
GPIOx_
OSPEEDR
(where x =
0x08
A..I/J/K except
B)
Reset value
GPIOB_
OSPEEDR
0x08
Reset value
GPIOA_PUPDR
0x0C
Reset value
GPIOB_PUPDR
0x0C
Reset value
GPIOx_PUPDR
(where x =
0x0C
I
C.. /J/K)
Reset value
GPIOx_IDR
(where x =
0x10
A..I/J/K)
Reset value
GPIOx_ODR
(where x =
0x14
A..I/J/K)
Reset value
GPIOx_BSRR
(where x =
0x18
A..I/J/K)
Reset value
GPIOx_LCKR
(where x =
0x1C
A..I/J/K)
Reset value
GPIOx_AFRL
(where x =
0x20
A..I/J/K)
Reset value
Table 39. GPIO register map and reset values (continued)
Reserved
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 1 1 0 0 1 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
Reserved
Reserved
0 0 0 0 0 0 0 0 0
Reserved
AFRL7[3:0] AFRL6[3:0]
0 0 0 0 0 0 0 0 0
DocID018909 Rev 11
0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
x
0
0 0 0 0 0 0 0 0
0 0
AFRL5[3:0] AFRL4[3:0] AFRL3[3:0]
0 0 0 0 0 0 0 0
General-purpose I/Os (GPIO)
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 1 1
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 1 0 0
0 0 0 0 0 0 0 0 0
x x x x x x x x x
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
AFRL2[3:0] AFRL1[3:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
x x x x x x
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
AFRL0[3:0]
0 0 0 0 0 0
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