STMicroelectronics STM32F405 Reference Manual page 212

Reset and clock control for STM32F42xxx and STM32F43xxx (RCC)
Table 33. RCC register map and reset values for STM32F42xxx and STM32F43xxx (continued)
Addr. Register
offset name
RCC_PLLSAI
0x88
CFGR
RCC_DCKCF
0x8C
GR
Refer to
addresses.
212/1731
Reserved
Table 1: STM32F4xx register boundary addresses
DocID018909 Rev 11
Reserved PLLSAIDIVQ
for the register boundary
RM0090
Reserved PLLI2SDIVQ