Dpwm Minimum Duty Cycle Low Register (Dpwmmindutylo); Dpwm Minimum Duty Cycle Low Register (Dpwmmindutylo) Register Field Descriptions - Texas Instruments UCD3138 Technical Reference Manual

DPWM 0-3 Registers Reference

2.31.24 DPWM Minimum Duty Cycle Low Register (DPWMMINDUTYLO)

Address 0005005C – DPWM 3 Minimum Duty Cycle Low Register
Address 0007005C – DPWM 2 Minimum Duty Cycle Low Register
Address 000A005C – DPWM 1 Minimum Duty Cycle Low Register
Address 000D005C – DPWM 0 Minimum Duty Cycle Low Register
Figure 2-40. DPWM Minimum Duty Cycle Low Register (DPWMMINDUTYLO)
17
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 2-29. DPWM Minimum Duty Cycle Low Register (DPWMMINDUTYLO) Register Field
Bit Field
17-4 MIN_DUTY_LOW
3-0 Reserved
96
Digital Pulse Width Modulator (DPWM)
MIN_DUTY_LOW
R/W-00 0000 0000 0000
Type Reset
R/W 00 0000
Configures lower threshold for minimum duty cycle logic. Low resolution register, last
0000
4 bits are read-only.
0000
R 0000
Copyright © 2016, Texas Instruments Incorporated
4 3
Descriptions
Description
SNIU028A – February 2016 – Revised April 2016
www.ti.com
0
Reserved
R-0000
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