Texas Instruments UCD3138 Technical Reference Manual page 22

15-13. Memory Fine Base Address High Register 6 (MFBAHR6)
15-14. Memory Fine Base Address High Register 7 (MFBAHR7)
15-15. Memory Fine Base Address High Register 8 (MFBAHR8)
15-16. Memory Fine Base Address High Register 9 (MFBAHR9)
15-17. Memory Fine Base Address High Register 10 (MFBAHR10)
15-18. Memory Fine Base Address High Register 11 (MFBAHR11)
15-19. Memory Fine Base Address High Register 12 (MFBAHR12)
15-20. Memory Fine Base Address High Register 13 (MFBAHR13)
15-21. Memory Fine Base Address High Register 14 (MFBAHR14)
15-22. Memory Fine Base Address High Register 15 (MFBAHR15)
15-23. Memory Fine Base Address High Register 16 (MFBAHR16)
15-24. Program Flash Control Register (PFLASHCTRL)
15-25. Data Flash Control Register (DFLASHCTRL)
15-26. Flash Interlock Register (FLASHILOCK)
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16-1.
16-2. Base Address
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16-3.
16-4. Clock Control Register (CLKCNTL)
16-5. System Exception Control Register (SYSECR)
16-6. System Exception Status Register (SYSESR)
16-7. Abort Exception Status Register (ABRTESR)
16-8. Global Status Register (GLBSTAT)
16-9. Device Identification Register (DEV)
16-10. System Software Interrupt Flag Register (SSIF)
16-11. System Software Interrupt Request Register (SSIR)
18-1. IRQ Index Offset Vector Register (IRQIVEC)
18-2. FIQ Index Offset Vector Register (FIQIVEC)
18-3. FIQ/IRQ Program Control Register (FIRQPR)
18-4. Pending Interrupt Read Location Register (INTREQ)
18-5. Interrupt Mask Register (REQMASK)
22
List of Figures
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Copyright © 2016, Texas Instruments Incorporated
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SNIU028A - February 2016 - Revised April 2016
www.ti.com
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