Texas Instruments UCD3138 Technical Reference Manual page 425

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The RXERR flag, also in the UARTRXST register, is the logical OR of the parity error, framing error,
overrun error, wake-up, and break-detect flags.
This UART Data Transfer feature allows software that is polling for receiver errors to check only one bit,
which will indicate if any or all of the five error conditions are active.
Error interrupts are controlled by three separate enable bits: RXERR_INT_ENA, BRKDT_INT_ENA, and
WAKEUP_INT_ENA.
If RXERR_INT_ENA (UARTCTRL3.0) is set, an error interrupt is generated when the receiver detects
either a parity, framing, or overrun error. The break-detect interrupt is enabled separately.
If BRKDT_INT_ENA (UARTCTRL3.1) is set, an error interrupt is generated if the receiver detects a break
condition. A break condition occurs when the SCI_RX line remains continuously low (active) for at least 10
bits immediately following a missed stop bit.
If WAKEUP_INT_ENA (UARTCTRL3.2) is set, an error interrupt is generated when bus activity on the RX
line either prevents power-down mode from being entered or RX line activity causes an exit from power-
down mode.
SNIU028A – February 2016 – Revised April 2016
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Error Interrupts
425
UART Overview