Address Decoder (Dec) - Texas Instruments UCD3138 Technical Reference Manual

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16.1 Address Decoder (DEC)

The Address Decoder generates the memory selects for Flash, ROM and RAM arrays. The memory map
addresses are selectable through configurable register settings for low and high boundaries. These fine
memory selects can be configured from 1K to 16M sizes. Power on reset uses the default addresses in
the memory map for ROM execution, which is then configured by the ROM code to the application setup.
During access to the DEC registers, a wait state is asserted to the CPU. DEC registers are only writable in
the Privilege mode for user mode protection.
The DEC Address Manager controls memory mapping and flash programming. All memory mapping
activity is normally done by the boot ROM. This is described in this document. This information is only
useful if there is some need to return to ROM mode without going through a reset first.
There may be a need for customer programs to erase and program both Program and Data Flash, so this
is discussed in some detail.
16.1.1 Memory Mapping Basics
There are 4 memory address spaces in the UCD3138. Each memory space has a pair of registers to set
its address and block size:
Register
Number
0
1 Program Flash
2
3
SNIU028A – February 2016 – Revised April 2016
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Memory Size in Bytes
Boot ROM 4K
32K
Data Flash 2K
RAM 4K
Copyright © 2016, Texas Instruments Incorporated
Address at
Address in ROM Mode
Reset
0x0000 0000 -
Most of space
0x0000 FFFF
0x0001 0000 -
-
0x0001 7FFFF
- 0x0001 8800 - 0x0001 8FFF
- 0x0001 9000 - 0x0001 9FFF
Address Decoder (DEC)
Address in Flash Mode
0x0000 A000 -
0x0000 AFFF
0x0000 0000 -
0x0000 7FFFF
497
Control System Module