Texas Instruments UCD3138 Technical Reference Manual page 356

Digital power supply controller
Hide thumbs Also See for UCD3138:
Table of Contents

Advertisement

PMBus Slave Mode Command Examples
EOM
PEC_VALID
DATA_RDY
RD_BYTE_COUNT
Write to ACK
1. End of Message indicated by rising edge on PMBUS_DATA pin (PMBus STOP)
After a delay of tEOM from the falling edge, 4 things occur simultaneously
– EOM bit is set
– PEC_VALID is set if the last byte matches a valid PEC. Since this message doesn't have a
PEC, the result will be random, depending if the PEC calculation happens to match. In all these
drawings, a rising edge on the PEC_VALID line means that the PEC_VALID bit is set or
cleared to indicate whetehre the last byte was a valid PEC for the message.
– DATA_RDY is set
– RD_BYTE_COUNT is set to 1
2. The firmware will read the PMBST (status) register. This will clear all the clear on read status bits. It
will also clear any interrupts caused by those bits. The firmware will determine which message type is
present from the PMBST bits.
3. Next the firmware needs to get the data from the RXBUF register. Then it needs to write a 1 to the
ACK register. This tells the PMBus hardware that it can accept new data. In this case, the ACK is only
used internally to tell the interface that the firmware has recognized the EOM. The ACK bit is cleared
immediately on being set. Writing a NACK (zero) to the ACK register is not appropriate here, since the
entire message has already been ACKed by the hardware. Writing a NACK may cause issues with
later messages.
4. If the ACK register is not written to from by point 3, and the address for the second message is also
auto acknowledged by the hardware, clock stretching will start at the beginning of the next ACK. If the
address doesn't match what's programmed into the PMBus slave address, no clock stretching will
occur. The timing between a write to the ACK register and the release of the clock stretch will be
t
. The clock stretching is automatically provided by the hardware with no firmware action
ACKWRITE
required.
356
PMBus Interface/I2C Interface
1
7
1
1
S
Address Wr A
Figure 10-1.
Copyright © 2016, Texas Instruments Incorporated
First Message Second Message
8
1
1
A
P
Command
1
SNIU028A – February 2016 – Revised April 2016
www.ti.com
1
7
1
Address
S
A
2
3
Submit Documentation Feedback

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents