Initialization For I2C - Texas Instruments UCD3138 Technical Reference Manual

PMBus Slave Mode Initialization
• MAN_CMD
– Default = 0 – command auto acknowledged
– 1 – command must be acknowledged by firmware.
– This is useful if the Master requires invalid commands to be NACKed
• MAN_SLAVE_ACK
– Default = 0 – slave address ACKed automatically.
– 1 – Slave address must be acknowledged by firmware
– This is useful if multiple slave addresses are desired and the mask register can't provide them
automatically
All manual ACKs should only be used if necessary for the application, as they will increase CPU and bus
overhead.

10.2.3 Initialization for I2C

The I2C bus is very similar to the PMBus. One difference is that the I2C has no maximum clock low time.
The PMBus has a 35 msec maximum clock low time, and the UCD3138 PMBus interface automatically
detect violations of this. If this functionality is not desired, you can set the CLK_LO_DIS bit in PMBCTRL3.
10.2.4 Initialization for Advanced Features in Some Devices
Several newer UCD3138 family members have advanced features in the PMBus interface:
10.2.4.1 Auto Acknowledge of Second Address
The UCD3138A64, UCD3138A64A, UCD3138128 and UCD3138128A can automatically acknowledge a
second address. To use this:
• Write the address to the SLAVE_ADDR_2 bitfield in PMBCTRL2
• Set the SLAVE_ADDR_2_EN bit in PMBCTRL2
• These fields are only available on the '128 and '128A devices
10.2.4.2 Clock High Timeout Detection
The UCD3138 and UCD3138064 devices have bits called CLK_HIGH_DETECT (in PBINTM) and
CLK_HIGH_TIMEOUT (in PMBST) but they are not recommended for use.
On the UCD3138A, UCD3138064A, UCD3138A64, UCD3138A64A, UCD3138128 and UCD3138128A,
the Clock High Timeout function is usable. Because of the need for backward compatibility, the
UCD3138A and the UCD3138064A handle it a bit differently than the other devices.
All of the devices which support Clock High Timeout have an enable/disable bit added to PMBCTRL3. On
the 'A64, 'A64A, '128 and '128A, the bit is an disable bit which defaults to a 1. On the UCD3138A and the
'064A, it is an enable bit which defaults to a zero. This is to provide backward compatibility because bit
was a zero in the non-a versions of those chips.
The name of the bit in PBINTM also changes. Here is a table of all the chips with the bit names:
UCD3138 CLK_HIGH_TIMEOUT
UCD3138064 CLK_HIGH_TIMEOUT
UCD3138A64 CLK_HIGH_TIMEOUT
UCD3138128 CLK_HIGH_TIMEOUT
354
PMBus Interface/I2C Interface
Table 10-1.
PMBST PMBINTM
CLK_HIGH_D
ETECT
CLK_HIGH_D
ETECT
CLK_HIGH_TI
MEOUT
CLK_HIGH_TI
MEOUT
Copyright © 2016, Texas Instruments Incorporated
PMBCTRL3
N/A
N/A
CLK_HI_DIS
CLK_HI_DIS
SNIU028A – February 2016 – Revised April 2016
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Notes
Do not use
Do not use
Low to enable
Low to enable