Pmbus Acknowledge Register (Pmback); Pmbus Acknowledge Register (Pmback) Register Field Descriptions - Texas Instruments UCD3138 Technical Reference Manual

Digital power supply controller
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PMBus Interface Registers Reference

10.10.4 PMBus Acknowledge Register (PMBACK)

Address FFF7F60C
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 10-8. PMBus Acknowledge Register (PMBACK) Register Field Descriptions
Bit
Field
0
ACL
386
PMBus Interface/I2C Interface
Figure 10-56. PMBus Acknowledge Register (PMBACK)
Type
Reset
R/W
0
Allows firmware to acknowledge or not acknowledge received data
0 = NACK received data (Default)
1 = Acknowledge received data, bit clears upon issue of ACK on PMBus
Copyright © 2016, Texas Instruments Incorporated
0
ACK
R/W-0
Description
SNIU028A – February 2016 – Revised April 2016
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