Filter Math Details - Texas Instruments UCD3138 Technical Reference Manual

Filter Math Details

4.1 Filter Math Details
The Filter uses binary arithmetic. In most cases the precision of the results is preserved at the highest
level until the rounding/clamping at the output of the filter. The main exception to this is the extra pole,
using alpha, which has to round to a decreased resolution immediately. The filter is relatively complex, so
scaling is discussed in sections. After the filter math details are described, the registers which control the
filter are documented.
4.1.1 Filter Input and Branch Calculations
Here is a block diagram of the first part of the filter, with bit width information:
Limit Comparator
Limit 5
Limit 4
.....
Limit 0
EADC_DATA
<>
Xn
9
Xn-1 Reg
9
Optional
Selected
by
KI_ADDER_
MODE
9
All values shown in the filter are signed numbers, with the most significant bit going to the sign bit. All are
treated as being normalized to 1.
The main input to the filter is a 9 bit signed value from an Error ADC. It is shown on the upper left as Xn. It
goes to the input for filter calculations, and it also goes to a digital comparator. The Filter provides for
nonlinear calculations, with up to 7 different coefficient sets selected by the Xn value. This can be used to
change the compensation of the filter with different input error ranges. For a complete discussion of this
feature, see Section
144
Filter
Coefficient
select
9
9 9
+
9
−
X X
1 −
n n
-
Figure 4-1.
4.3.6.
Copyright © 2016, Texas Instruments Incorporated
PID Filter Branch
Stages
Kp Coef
16
24
9
X
Ki Coef
16
24
9 24
+
X
24
Kd alpha
9
Kd coef X
32
Round
16
24
9
24
X
+
SNIU028A – February 2016 – Revised April 2016
www.ti.com
24
P
Ki High
24
24
Ki_yn reg
Clamp
24
Ki Low
24
Kd yn_reg
24
24
24
D
Clamp
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24
I