Read Byte W/O Pec Byte; Read Byte With Pec Byte; Read Word W/O Pec Byte; Read Word With Pec Byte - Texas Instruments UCD3138 Technical Reference Manual

Digital power supply controller
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10.7.5 Read Byte/Read Word
S
Device Addr
S
Device Addr
S
Device Addr
The Read Byte and Read Word messages consist of a device address, a command byte, received data
bytes from a slave and an optional PEC byte. Read Byte messages include a single byte, while the Read
Word message protocol supports receipt of 2 bytes from the slave. Similar to the Receive Byte Protocol,
the Master Control Register is configured to receive 1 or 2 bytes, the CMD_EN bit is set and the PEC_EN
is configured to expect or not expect a PEC byte appended to the message. The PMBus Interface will
automatically terminate the message after the expected number of bytes is received from the slave or if
the slave does not properly acknowledge any portion of the message.
In addition to programming the Master Control Register, the firmware is expected to load the command
byte into bits 7-0 of the Transmit Data Register. Any data received from the slave will be found in the
Receive Data Register.
After programming the Master Control Register, the PMBus Interface initiates a Read Byte/Read Word
message on the PMBus. The firmware can wait for an End of Message interrupt from the interface. Upon
the EOM interrupt, the Status Register is read to determine the number of bytes received (1 for a Read
Byte/2 for a Read Word). The received data bytes are found in Bits 15-0 of the Receive Data Register. If
PEC is enabled for the message, the PEC_VAL bit in the Status Register can be verified to check the
accuracy of the received PEC byte from the Slave.
SNIU028A – February 2016 – Revised April 2016
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Wr
A
Command
Figure 10-31. Read Byte w/o PEC Byte
Wr
A
Command
A
Sr
Figure 10-32. Read Byte with PEC Byte
Wr
A
Command
Byte #1
Figure 10-33. Read Word w/o PEC Byte
Byte #1
Figure 10-34. Read Word with PEC Byte
Copyright © 2016, Texas Instruments Incorporated
A
Sr
Device Addr
Rd
Device Addr
Rd
A
A
Sr
Device Addr
Rd
NA
P
A
PEC
NA
P
Master Mode Operation Reference
A
Byte #0
NA
P
Byte #0
A
PEC
NA
P
A
Byte #0
A
PMBus Interface/I2C Interface
375

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