Pmbus Control Register 3 (Pmbctrl3); Pmbus Control Register 3 (Pmbctrl3) Register Field Descriptions - Texas Instruments UCD3138 Technical Reference Manual

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10.10.9 PMBus Control Register 3 (PMBCTRL3)

Address FFF7F620
I2C_MODE_EN*
22 21
MASTER_EN SLAVE_EN
R/W-0 R/W-0
15 14
SCL_MODE SDA_DIR
R/W-0 R/W-0
7 6
ALERT_VALUE ALERT_MODE
R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 10-13. PMBus Control Register 3 (PMBCTRL3) Register Field Descriptions
Bit Field
24 I2C_MODE_EN*
23 CLK_HI_DIS*
23 CLK_HI_EN*
22 MASTER_EN
21 SLAVE_EN
20 CLK_LO_DIS
19 IBIAS_B_EN
18 IBIAS_A_EN
17 SCL_DIR
SNIU028A – February 2016 – Revised April 2016
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Figure 10-61. PMBus Control Register 3 (PMBCTRL3)
24
R/W-0
20
CLK_LO_DIS
R/W-0
13 12
SDA_VALUE SDA_MODE
R/W-0 R/W-0
5 4
CNTL_INT FAST_MODE_
_EDGE PLUS
R/W-0 R/W-0
Type Reset
R/W 0
I2C Mode Enable – Utilized for Master mode only
0 = I2C Mode Disabled (Default)
1 = I2C Mode Enabled
The only effect of I2C_MODE_EN is to remove the automatic insertion of number of
bytes in block writes in master mode.
*Only available on UCD3138A64 and UCD3138128 A and non-A versions
R/W 1
Clock High Timeout Disable
0 = Clock High Timeout Enabled
1 = Clock High Timeout Disabled (Default)
*Only available on UCD3138A64 and UCD3138128 A and non-A versions
R/W 0
Clock High Timeout Enable
0 = Clock High Timeout Disabled (Default)
1 = Clock High Timeout Enabled
*Only available on UCD3138A and UCD3138064A
R/W 0
PMBus Master Enable
0 = Disables PMBus Master capability (Default)
1 = Enables PMBus Master capability
R/W 0
PMBus Slave Enable
0 = Disables PMBus Slave capability
1 = Enables PMBus Slave capability (Default)
R/W 0
Clock Low Timeout Disable
0 = Clock Low Timeout Enabled (Default)
1 = Clock Low Timeout Disabled
R/W 0
PMBus Current Source B Control
0 = Disables Current Source for PMBUS address detection thru ADC (Default)
1 = Enables Current Source for PMBUS address detection thru ADC
R/W 0
PMBus Current Source A Control
0 = Disables Current Source for PMBUS address detection thru ADC (Default)
1 = Enables Current Source for PMBUS address detection thru ADC
R/W 0
Configures direction of PMBus clock pin in GPIO mode
0 = PMBus clock pin configured as output (Default)
1 = PMBus clock pin configured as input
Copyright © 2016, Texas Instruments Incorporated
CLK_HIS_DIS* or CLK_HI_EN*
19 18
IBIAS_B_EN IBIAS_A_EN
R/W-0 R/W-0
11
CNTL_DIR CNTL_VALUE
R/W-0 R/W-0
3
FAST_MODE BUS_LO_INT_
EDGE
R/W-0 R/W-0
Description
PMBus Interface Registers Reference
23
R/W-1 or R/W-0
17
SCL_DIR SCL_VALUE
R/W-0
10 9
CNTL_MODE ALERT_DIR
R/W-0
2 1
ALERT_EN
R/W-0
PMBus Interface/I2C Interface
16
R/W-0
8
R/W-0
0
RESET
R/W-0
393