Slave Address Manual Ack On A Read Address; Quick Command Read - Texas Instruments UCD3138 Technical Reference Manual

PMBus Slave Mode Command Examples
the firmware needs to make sure that TX_COUNT is set to 1.
7. Next the firmware needs to write the byte to TXBUF. It takes T
stretching of the ACK to be ended. If the firmware is fast enough, no clock stretching will occur.
8. As soon as the data starts being transmitted, the TXBUF is transferred to the shift register
9. The EOM bit will be set t
EOM ACK handling is the same as the one byte read above. For 6, 7, and 8 bytes, it is only necessary to
put more bytes into the TXBUF register and a higher number into TX_COUNT. At 9 bytes, the TXBUF
reload needs to occur again. This continues with TXBUF reloads every 4 bytes until the end of the
message is reached.
If code is being ported from an processor limited to a 1 byte TXBUF, it is possible to always write only 1
byte to TXBUF, and to keep TX¬¬¬_COUNT always a 1. This will significantly increase overhead because
the data request, write to TXBUF sequence will occur on every byte, instead of every 4.

10.3.11 Quick Command Read

New PMBus standards have introduced a quick command read, where the Master send just an address
with teh alst bit set for a read, followed by a stop. This needs to be handled like any other read command,
including putting at least one byte into the RXBUF. The STOP from the master will terminate the
transmission from the slave, so it will be handled properly. As described above, the PMBus hardware will
not ACK the address until something is written to RXBUF.
10.3.12 Simple Read with Manual Slave Address ACK
Manual slave address ACK is different with a read than with a write. This is because of the generation of
the DATA_REQUEST bit and the need to write to TXBUF right after the address is received.
Here is the sequence diagram:
SLAVE_ADDR_READY
Write to ACK
DATA_REQUEST
Write to TXBUF
Figure 10-13. Slave Address Manual ACK on a Read Address
364
PMBus Interface/I2C Interface
ns after the falling edge of the data line indicating the stop signal.
EOM
1
S Address Rd
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ns after the write for any clock
txbwrite
7 1 1
1
2
SNIU028A – February 2016 – Revised April 2016
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