Write Control Register (Wctrl); Write Control Register (Wctrl) Register Field Descriptions - Texas Instruments UCD3138 Technical Reference Manual

Memory Controller – MMC Registers Reference

15.1.2 Write Control Register (WCTRL)

Address FFFFFD2C
TRAIL_OVR
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 15-6. Write Control Register (WCTRL) Register Field Descriptions
Bit Field
1 TRAIL_OVR
0 WBUF_ENA
470
Memory
Figure 15-2. Write Control Register (WCTRL)
1
R/W-0
Type Reset
R/W 0
Write trailing wait state override.
0 = At least one trailing wait state (Default)
1 = TRAIL sets trailing wait states
R/W 0
Write buffer enable. When this bit is 1, the memory controller latches the data and
control signals in the first cycle for write operations to the memories and peripherals
on the expansion bus and lets the CPU perform other operations. However, the CPU
starts a wait state if there is another request before the memory controller finishes.
0 = Write buffer disabled (Disabled)
1 = Write buffer enabled
Copyright © 2016, Texas Instruments Incorporated
0
WBUF_ENA
R/W-0
Description
SNIU028A – February 2016 – Revised April 2016
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