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T24 Capture Block
It is necessary to design the program to compensate for a counter overflow in case one occurs during that
section of firmware. The OV_FLAG bit is useful in this case.
The counter is completely free running. There is no way to write to it, reset it, or to change when it
overflows. It just keeps counting until all 24 bits overflow, then it starts over from zero.
The counter provides a 24-bit timer bus to all input capture and output compare units inside the
Capture/Control module.
11.3 T24 Capture Block
The T24's capture block is used to collect timing information about external signals. The capture block can
be programmed to capture the 24 bit timer value on an edge on the external signal. It can also generate
an interrupt on the edge.
The edge control bits can select:
00 = No Capture (Default)
01 = Rising Edge
10 = Falling Edge
11 = Both Edges
For example, to program for both edges:
TimerRegs.T24CAPCTRL.bit.EDGE = 3;
There are CAP_INT_ENA and CAP_INT_FLAG bits which work much the same as the overflow bits for
the 24 bit counter. They are also in the T24CAPCTRL register.
For low speed signals, a single capture block can be used for both edges. For example, to determine the
positive pulse width of a signal:
•
Connect the signal to the TCAP pin
•
Enable capture on the rising edge
•
Poll the CAP_INT_FLAG bit, or enable the interrupt.
•
When the capture occurs, read the capture data register
result = TimerRegs.T24CAPDAT.bit.CAP_DAT;
•
Then enable capture on the falling edge.
•
When the capture occurs, read the capture data register again and subtract:
result = TimerRegs.T24CAPDAT.bit.CAP_DAT - result;
Note that overflow handling may be necessary as well. This depends on the expected timing of the signal.
One simple solution is that if the final result is negative, adding 0x1000000, (2
result. This is accurate so long as only one overflow has occurred. If there is a possibility of more than one
overflow occurring, it will be necessary to keep track of this.
The same approach can apply to any combination of edges.
For measuring fast pulses, it may be necessary to use both capture pins for a single signal. For a fast
positive pulse, for example, program one capture register for the rising edge and one for the falling edge.
Note that this only works when the low signal time is long enough to permit initialization. If the low going
pulse is fast also, it is not possible to tell which edge came first.
There is also a T24CAPIO register which permits using the TCAP pin as a General Purpose I/O pin. It is
very straightforward to use. See
Note that the registers will continue to capture edges. The capture registers do not take the first capture
value and hold it. Instead, they will give the time value of the latest edge.
The capture can also come from other sources. There is a CAP_SEL bitfield in the T24CAPCTRL register.
It can select from 4 signal sources:
•
TCAP – the default, dedicated pin
•
SCI_RX0 – useful for measuring the receive baud rate
398
Timer Module Overview
//both edges
Section 11.21.5
for more information.
Copyright © 2016, Texas Instruments Incorporated
24
) will give the correct
SNIU028A – February 2016 – Revised April 2016
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